In this tutorial, we give the Board File and Manual methods for creating a Vivado Project compatible with the IP Cores delivered in the Distribution. The IP Cores enforce FPGA part compatibility between the Vivado project’s FPGA part and the IP Cores’ requested board’s FPGA part.

In this method, the FPGA Part is contained in the Board File and the IP Cores are automatically configured for that Board File. No board drop-down selector will be presented in the wizard.

1. Create a new project.
2. Select the Boards tab in the Default Part menu.
3. Fetch the latest available board versions from Xilinx’s Board Store Git repository by clicking the Refresh button.
4. Use the Vendor filter and select opalkelly.com.
5. Install the target board file by clicking the install icon in the Status column of the board listing.
6. Select the installed Board File, click Next, and finally Finish to create the project.

In this method, the FPGA Part will be selected explicitly when creating a new project. The IP Core cannot automatically determine an Opal Kelly board, so it presents a board drop-down selector in the wizard.

1. Create a new project.
2. Enter the FPGA Part for the target board into the search bar in the Default Part menu. See Table 3.3 in the Configuration Parameters Technical Reference for the correct FPGA part to use here.
3. Select the FPGA Part, click Next, and finally Finish to create the project.
4. Select the target Opal Kelly board using the Board drop-down selector in the IP Cores’ wizards for all projects utilizing this method.

If the FPGA part is not listed, then device support is not available. Add device support through Help > Add Design Tools or Devices.