FrontPanel Reference Designs
Opal Kelly’s FrontPanel SDK provides a high-speed USB 3.0 link between the FPGA on the XEM8320 and your software. Several reference designs are included as part of the FrontPanel SDK and are not specific to the XEM8320. These examples can be found in the FrontPanel Getting Started Guide and provide useful references for the fundamental functionalities of the FrontPanel framework. See the Samples and Tools page for a list of examples.
When you’re ready to build your own FrontPanel-based gateware, we provide XDC constraint files from the Pins reference for the XEM8320. Simply click Export > Generate Constraints File and apply these constraints to your logic design.
For additional information on using Pins, refer to the Pins Documentation.
Vivado Board File
A Vivado Board File (VBF) is available for the XEM8320-AU25P Development Platform. Please see Vivado Board File for more information.
Please note that the present VBF does not support the FrontPanel host interface for software connectivity.
SYZYGY Camera Reference Design
Opal Kelly’s Camera Reference Design is a collection of hardware, gateware, and software that demonstrate the creation of a full-featured data acquisition (image capture) application using the FrontPanel SDK. Multiple hardware cameras support various Opal Kelly products but the XEM8320 is supported by the SZG-CAMERA and SZG-MIPI-8320 camera hardware.
The gateware portion of the reference design includes an image capture pipeline as well as camera control interfacing appropriate to the image sensor on the hardware. Multiplatform software (Windows, Linux, macOS) includes a simple command-line utility (
okSnapApp) to capture a single frame from the image sensor as well as a full-featured GUI (
okCameraApp) to perform real-time continuous image capture and display.
CMOS Camera Interface
The SZG-CAMERA hardware includes an ON Semi AR0330CM 1/3-inch, 3.4-Megapixel CMOS digital image sensor with 12-bit ADC and A-law compression. The RGB color sensor uses a four-lane HiSPi serial interface to achieve up to 60 fps with a 196 Mp/s readout rate.
MIPI Camera Interface
The SZG-MIPI-8320 is a SYZYGY-compliant camera interface that is compatible with the XEM8320 MIPI signaling and supports up to three (3) MIPI cameras with FPC connectors such as the Digilent PCAM.
SYZYGY PCI Express Reference Design
The SYZYGY PCI Express reference design is designed around the SZG-PCIEX4 PCIe x4 host interface peripheral. This is a half-height PCI Express card that fits to a standard PCI Express PC and uses high-performance transceiver SYZYGY cabling to an external SYZYGY carrier such as the XEM8320.
The reference design gateware is built using the PCI Express reference design from Xilinx.
SYZYGY Ethernet Reference Design
The SYZYGY ethernet reference design is designed around the SZG-ENET1G ethernet PHY peripheral supporting 10/100/1G ethernet standards with standard CAT5 or CAT6 cable (RJ-45 connector). The reference design gateware is built using the Xilinx Tri-Mode ethernet media access controller (TEMAC).
A FrontPanel GUI is used to control and observe the various settings of the ethernet MAC.
SYZYGY ADC Reference Design
- LVDS and DDR I/O interfacing with frame synchronization
- Data acquisition memory buffering
- FrontPanel pipe transfers (FPGA to host)
- Graphical waveform display in Python
This is a good starting point for basic data acquisition designs and can be expanded into software-defined radio, digital communication, and other full-featured applications.
SYZYGY DAC Reference Design
- High speed CMOS I/O interfacing
- CORDIC-based waveform generation
- Low-speed serial ADC data acquisition
- Digital AM and FM modulation
- Continuous data transfer via the FrontPanel SDK
This signal generator and digital modulator is a good starting point for waveform and signal generation applications and software-designed radio. A FrontPanel GUI is used to control the various settings on this application.
SYZYGY Sensor Reference Design
- I2C, SPI, and UART communication to a Syzygy peripheral
- FrontPanel pipe transfers (FPGA to host)
- FrontPanel API usage with Python
- Utilizing all of the modules on the SZG-SENSOR
The sensor design showcases communicating with a Syzygy device using various communication protocols. The provided Python scripts show how to interface with the various sensors on the SZG-SENSOR, and uses the FrontPanel API to retrieve the data from the FPGA and display it in human readable format.