The SZG-ENET1G is a 10/100/1000 Mb/s RGMII Ethernet PHY module featuring the Texas Instruments DP83867 PHY. This module is an excellent choice for adding Ethernet connectivity to your SYZYGY carrier board. Connection to the PHY through the RJ-45 cage allows standard Ethernet cable to be used.

Resources 

Design

Address Strapping

Strapping resistor locations have been added to pins RXD0, RXD2, and RXD4 on the PCB for specifying the address of the PHY when using the Serial Management Interface. These are not populated, giving the device an address of 0x00. You can read how to strap these pins in the DP83867 datasheet.

Clock Strapping

Strapping resistor locations have been added to pin RXD7. These resistors are not populated, enabling the clock output. By default this clock output is synchronous to the XI oscillator / crystal input and is outputted to the CLK_OUT pin. 

Ethernet MAC ID PROM

This is an EEPROM device Pre-Programmed with a EUI-48™ MAC Address that has been assigned by the IEEE Registration Authority. It is accessed via I2C at the 7 bit address 0x57. The most significant byte for the 48 bit MAC address is at address 0xFA and the least significant byte is at address 0xFF. You can read more about this in the 24AA025E48’s datasheet. 

RJ-45 Cage LEDs

The RJ-45 cage used has three LEDs whose on/off states are controlled by the LED_0, LED_1, and LED_2 pins from the PHY. Green and orange LEDs are on the left hand side of the cage which will combine to show brown if both are luminated. A yellow LED is on the right hand side of the cage. The following connections and default behavior are as follows:

  • Yellow (LED_2) on right side of cage: RX/TX Activity
  • Orange (LED_1) on left side of cage: 1000 Link Up
  • Green (LED_0) on left side of cage:    Any Link Up

SYZYGY Information

Compatibility Table

COMPATIBILITY PARAMETER SPECIFICATION
Port typeSYZYGY Standard
WidthSingle
5V supply requiredNo
Nominal 5V supply currentN/A
Nominal 3.3V supply current150mA
VIO supply voltage1.8V, 2.5V or 3.3V
Nominal VIO supply current35mA
Total number of I/O16
Number of differential I/O pairs0

DNA Data

DNA PARAMETER DATA
Max 5V Load0mA
Max 3.3V Load150mA
Max VIO Load35mA
IS_LVDSFalse
IS_DOUBLEWIDEFalse
IS_TXR4False
VIO Range(s)[1.8,1.8], [2.5,2.5], [3.3,3.3]

Pinout

SYZYGY (J1) CONNECTION
5 (D0P)RX_CTL
7 (D0N)TX_CTL
6 (S1)RESET_ENET_N
8 (S3)INT_N
9 (D2P)RXD3
11 (D2N)RXD2
10 (S5)TXD0
12 (S7)TXD1
13 (D4P)RXD1
15 (D4N)RXD0
14 (S9)TXD2
16 (S11)TXD3
17 (D6P)EEPROM_SCL
19 (D6N)EEPROM_SDA
18 (S13)MDC
20 (S15)Not Connected
21 (S16)Not Connected
22 (S17)Not Connected
23 (S18)Not Connected
24 (S19)Not Connected
25 (S20)Not Connected
26 (S21)Not Connected
27 (S22)Not Connected
33 (P2C_CLKp)RX_CLK
35 (P2C_CLKn)Not Connected
34 (C2P_CLKp)TX_CLK