The DUALSFP peripheral provides a pair of SFP+ sockets to a SYZYGY Transceiver port for use with high-performance serial standards over optical or copper wire connections.

• Aligni PLM – See the Attachments tab for schematics.
• SYZYGY Specification

This data is stored in the SYZYGY DNA microcontroller on the SZG-DUALSFP peripheral.

Note that the maximum 3.3V load below is an overestimate due to the variability in power consumption between SFP modules.

The source of the following pinout information is the SZG-DUALSFP schematic. This pinout follows the SYZYGY specification for TXR2 ports.

• Column PIN NUM (J1) lists the pin number on the SYZYGY specification’s Transceiver Samtec connector, this is reference designator J1 in the schematic.
• Column SIGNAL NAME lists the SYZYGY specification’s name for this pin’s connection.
• Column SCHEMATIC NET lists the net name found in the SZG-DUALSFP’s schematic for the connection.

The DUALSFP peripheral provides a pair of SFP+ sockets to a SYZYGY Transceiver port for use with high-performance serial standards over optical or copper wire connections.

Several eye diagrams were taken using Xilinx’s iBERT tool to empirically test the quality of the link.

Test conditions and setup:

• Vivado 2017.2
• iBERT version 3.0 (Rev. 15)
• Brain-1 used as the carrier
• Peripheral contained two Finisar FTL8524P2BNV SFP transceivers
• Scans performed at 3.75Gbps