Device Settings
The XEM8350 supports the FrontPanel Device Settings in the table below, accessible from the FrontPanel Application as well as the Device Settings API.
Note: All VIO and SZG device settings require a power cycle to take effect.
NAME | TYPE | DESCRIPTION |
---|---|---|
XEM8350_VIO1_VOLTAGE | INT32 | VIO1 output voltage specified in 10’s of mV. For example, “180” would set VIO1 = 1.8v. This rail has a valid range of 1.2 V to 1.8 V. DEFAULT: 0 (output is disabled) |
XEM8350_VIO2_VOLTAGE | INT32 | VIO2 output voltage specified in 10’s of mV. For example, “180” would set VIO2 = 1.8v. This rail has a valid range of 1.2 V to 1.8 V. DEFAULT: 0 (output is disabled) |
XEM8350_VIO_MODE | INT32 | 0x00 – IPMI with Device Settings fallback – IPMI is used to set the VIO voltages. If an IPMI EEPROM is not found, Device Settings will determine the output voltages. 0x01 – IPMI only – IPMI is used to set the VIO voltages. 0x02 – Device Settings only – VIO voltages are set through the VIOx_VOLTAGE device settings. 0x03 – SmartVIO only (see below) – SmartVIO is tested collectively so all present SmartVIO peripherals must result in a collective validation for any of the outputs to be enabled. DEFAULT: 0 |
XEM8350_SZG_TXR4_PORTS | INT32 | Bitfield used to indicate which SYZYGY ports (of the 16 possible ports) are TXR4 ports. Each bit represents a SYZYGY port, with bit 0 corresponding to the first SYZYGY address and bit 15 corresponding to the last SYZYGY address. A ‘1’ indicates that a particular port is a TXR4 port. DEFAULT: 0x0C00 (3072) – configuration of TXR4 ports on the BRK8350 |
XEM8350_FAN_MODE | INT32 | 0=Binary mode 1=Temperature slope mode DEFAULT: 0 |
XEM8350_FAN_ENABLE | INT32 | In binary mode, 0=disable, 1=enable DEFAULT: 1 |
XEM8350_FAN_TEMP_THRESHOLD | INT32 | In temperature slope mode, the number here represents the lower threshold (in degrees Celsius) for temperature-dependent operation. At THRESH, fan control PWM=0%. At THRESH+16C, fan control PWM=50%. At THRESH+32C, fan control PWM=100%. |
Fan Control Device Settings
You may optionally connect a fan to J4 (Molex 53398-0271). This connector drives a 5-16-volt PWM signal to the fan according to the Device Settings. For most applications, we recommend binary operating mode and enabling the fan at all times. You may optionally configure a proportional control whereby the PWM output is proportional to the measured temperature of the FPGA die.
SYZYGY SmartVIO
In SYZYGY SmartVIO mode the VIO voltage is determined by first reading the SYZYGY DNA of all SYZYGY peripherals then solving for a SmartVIO solution. Each of the two XEM8350 VIO rails corresponds to a SYZYGY VIO group. The first 8 SYZYGY ports (ports 0 to 7) are assigned to VIO1, with the second 8 SYZYGY ports (ports 8 to 15) assigned to VIO2. When XEM8350_VIO_MODE
is set to 0x03, all ports are scanned for peripherals and entered into the SmartVIO solver.