Powering the XEM8350
The XEM8350 requires a clean, filtered, DC supply within the range of 5 V to 16 V. This supply may be delivered through the DC power connector (rated to 5 A max current) or through the mezzanine connectors (rated to 16 A max current).
The XEM8350 power distribution system is quite complex, with several supplies designed to provide suitable, efficient power for several systems and modules. A block diagram of the system follows, with input (+VDC) shown to the left and accessible supply rails shown to the right.
Supply Heat Dissipation (IMPORTANT!!)
Due to the limited area available on the small form-factor of the XEM8350 and the density of logic provided, heat dissipation may be a concern. This depends entirely on the end application and cannot be predicted in advance by Opal Kelly. Heat sinks may be required on any of the devices on the XEM8350. Of primary focus should be the FPGA (U15) and SDRAM (U24, U25, U26, U27, U28). Although the switching supplies are high-efficiency, they are very compact and consume a small amount of PCB area for the current they can provide.
If you plan to put the XEM8350 in an enclosure, be sure to consider heat dissipation in your design.
FPGA heatsink information is provided on the Specifications Page
Power Supply
The XEM8350 is designed to be operated from a single 5-16-volt power source supplied through the DC power jack on the device. This provides power for the several high-efficiency switching regulators on-board to provide multiple DC voltages for various components on the device as well as three adjustable supplies for the peripheral.
DC Power Connector
The DC power connector on the XEM8350 is part number PJ-102AH from CUI, Inc. It is a standard “canon-style” 2.1mm / 5.5mm jack. The outer ring is connected to DGND. The center pin is connected to +VDC.
The PJ-102AH jack is rated for 5 A maximum continuous current. Applications requiring higher current must use the mezzanine connectors for providing power to the system (rated for a maximum of 16 A).
Power Budget
The table below can help you determine your power budget for each supply rail on the XEM8350. All values are highly dependent on the application, speed, usage, and so on. Entries we have made are based on typical values presented in component datasheets or approximations based on Xilinx power estimator results. Shaded boxes represent unconnected rails to a particular component. Empty boxes represent data that the user must provide based on power estimates.
The user may also need to adjust parameters we have already estimated (such as FPGA Vcco values) where appropriate. All values are shown in milliwatts (mW). Note that this table does not include the two supplies dedicated to the GTH transceivers. These are independent and can be computed separately for power budget based on their assigned function.
| COMPONENT(S) | 0.95 V | 1.0 V | 1.2 V | 1.2 V | 1.8 V | 3.3 V | VIO1 | VIO2 |
|---|---|---|---|---|---|---|---|---|
| Programmable clock | 150 | |||||||
| FX3 USB Host Interface | 385 | |||||||
| DDR4 VDD/VDDQ | 2,290 | |||||||
| DDR4 VTT Termination | 300 | |||||||
| DDR VPP | 330 | |||||||
| Misc System Functions | 2970 | |||||||
| FPGA VCCINT, VCCINT_IO, VCCBRAM | ||||||||
| FPGA MGTAVCC | 6,870 | |||||||
| FPGA MGTAVTT | 1,810 | |||||||
| FPGA MGTVCCAUX | 200 | |||||||
| FPGA VCCAUX, VCCAUX_IO | 1,450 | |||||||
| FPGA VCCO64 + VCCO65 (USB Host Interface) | 25 | |||||||
| FPGA VCCO66 + VCCO67 + VCCO68 (DDR4) | 250 | |||||||
| FPGA VCCO46 + VCCO47 + VCCO48 | ||||||||
| FPGA VCCO24 + VCCO25 + VCCO44 + VCCO45 | ||||||||
| Total (mW) | 6,870 | 1,810 | 2,840 | 2210 | 3,300 | |||
| Available (mW) | 38,000 | 8000 | 2,400 | 4,800 | 7,200 | 6,600 | 2000mA 0.95-1.8V | 2000mA 0.95-1.8V |
Example XEM8350-KU060 FPGA Power Consumption
XPower Estimator version 14.3 was used to compute the following power estimates for the Vccint supply. These are simply estimates; your design requirements may vary considerably. The numbers below indicate approximately 80% utilization.
| COMPONENT | PARAMETERS | VCCINT POWER (MW) |
|---|---|---|
| Clock | 200 MHz GCLK, 400,000 fanout | 1,132 |
| Clock | 300 MHz GCLK, 140,000 fanout | 954 |
| Clock | 200 MHz SR, 50,000 fanout | 258 |
| Logic | 200 MHz, 150,000 logic LUTs, 50,000 shift registers, 50,000 distributed RAMs, 400,000 registers | 2,766 |
| Logic | 300 MHz, 50,000 logic LUTs, 140,000 registers | 487 |
| Logic | 667 MHz (DDR4), 8000 logic LUTs | 155 |
| BRAM | 18-bit, 200 MHz, 1000 block RAMs, 50% toggle rate | 2,636 |
| BRAM | 36-bit, 300 MHz, 500 block RAMs, 50% toggle rate | 4,664 |
| DSP | 500 MHz, 2200 slices, 12.5% toggle rate | 2,991 |
| GTH | 32 channels, 16.3 Gb/s | 1,343 |
| Misc. | DCM, PLL, VCCINT_IO, etc. | 500 |
| Total | 17,886 mW | |
| Available | 38,000 mW |