BRK8350 Breakout Board
Unlike our integration modules, breakout boards are not intended for production integration. We reserve the right to change dimensions and functionality of this board at any time and may not necessarily have the previous version available for purchase.
Powering the BRK8350
The BRK8350 requires a clean, filtered, DC supply within the range of 6 V to 16 V. This supply may be delivered through the DC power connector (rated to 5 A max current) on the BRK8350 itself or the DC power connector on the XEM8350. Please refer to Powering the XEM8350 for information on the XEM8350 power systems.
IPMI EEPROM
The XEM8350 may optionally read peripheral information and configuration data from a small EEPROM on the peripheral. If available, the EEPROM can be used to automatically set the voltages for the three programmable voltage regulators on the XEM8350. An EEPROM is installed on the BRK8350 but is not loaded with any configuration. Use Opal Kelly’s IPMI EEPROM Generator Tool to generate an EEPROM image.
Peripherals and Connectors
The table below summarizes the various connectors on the BRK8350. The XEM8350 Pin List has connection information in the “BRK8350” column. Additionally, please refer to the schematics and layout available online for detailed connection diagrams.
| CONNECTOR TYPE | REFDES | FPGA BANK |
|---|---|---|
| SYZYGY Standard | J1 | 48 |
| SYZYGY Standard | J2 | 47 |
| SYZYGY Standard | J4 | 28 |
| SYZYGY Standard | J5 | 24 |
| SYZYGY Transceiver (TXR-4) | J8 | GTH 226 |
| SYZYGY Transceiver (TXR-4) | J23 | GTH 225 |
| U.FL | J15-16, J19-20 | GTH 126 |
| SMA | J6-7, J9-14 | GTH 128 |
| SMA | J24-25 | GTH 128 REFCLK0 |
| SATA | J26-27 | GTH 128 |
| QSFP | QSFP1 | GTH 224 |
| QSFP | QSFP2 | GTH 227 |
| M.2 | J32 | GTH 127 |
Clock Oscillator
| CLOCK | FREQUENCY | MC Pins | FPGA PINS (P / N) |
|---|---|---|---|
| MGT REFCLK1 | 100 MHz | MC3 17 / 19 | V32 / V33 (Bank 127) |
A PCIE clock generator chip provides a synchronous 100Mhz Gen3 compatible clock to both the M.2 connector and the MGT REFCLK1.
On Rev FXX and previous, this clock was provided to the transceiver ref clock by a separate on-board 100-MHz oscillator.
QSFP Transceiver Sockets
The BRK8350 has two QSFP cages installed, but the optical transceivers are optional. The following Finisar part is one example option.
| MANUFACTURER | PART NUMBER | DIGI-KEY P/N | APPROXIMATE COST |
|---|---|---|---|
| Formerica | TQS-Q14H9-J83 | 1785-1074-ND | $212.80 / each |
M.2 Socket
The M.2 connector (J32) is an M-keyed Socket 3 interface which supports SATA and PCIe-based SSD applications. The connector fits 22-mm wide modules. A positionable standoff is included for secure mounting of module types 2230, 2242, 2260, and 2280.
A PCIE clock generator chip provides a synchronous 100Mhz Gen3 compatible clock to both the M.2 connector (pins 53/55) and the MGT REFCLK1 (Bank 127 V32/V33).
On Rev FXX and previous, this clock was provided to the M.2 connector by a separate on-board 100-MHz MEMS oscillator.
Length Matching
Single-ended fabric I/O is routed to the SYZYGY ports with 50Ω characteristic impedance. Differential fabric I/O is routed to the SYZYGY ports as 100Ω differential impedance. Fabric I/O routing as been matched on the BRK8350 to each SYZYGY port as much as possible. This matching, and the length values below, represent the traces from mezzanine connectors to the SYZYGY ports.
SYZYGY Compatibility Table
|
PARAMETER |
PORT A |
PORT B |
PORT C |
PORT D |
PORT E |
PORT F |
|---|---|---|---|---|---|---|
|
Total 5V Supply Current |
2 A |
|||||
|
Total 3.3V Supply Current |
2 A |
|||||
|
Port Groups |
Group 1: A, B |
Group 2: C, D, E, F |
||||
|
Port Type |
Standard |
Standard |
Standard |
Standard |
Transceiver (TXR4) |
Transceiver (TXR4) |
|
Bank Type |
HP |
HP |
HP |
HP |
GTH + HP |
GTH + HP |
|
VIO Supply Voltage Range |
0.95 – 1.8 V |
0.95 – 1.8 V |
||||
|
Total VIO Supply Current |
2 A |
2 A |
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|
Port Spacing |
Double-Wide Spacing |
Double-Wide Spacing |
Double-Wide Spacing |
|||
|
I/O per Port |
28 total (8 DP) |
28 total (8 DP) |
28 total (8 DP) |
28 total (8 DP) |
10 total |
10 total |
|
Length Matching |
1563 – 2111 mils |
1441 – 2426 mils |
2101 – 2709 mils |
1256 – 2252 mils |
I/O: 1931 – 2524 mils Transceivers: 2865 – 3952 mils |
I/O: 3253 – 3883 mils Transceivers: 3978 – 4806 mils |
|
Length Matching |
1563 – 2111 mils |
1441 – 2426 mils |
2101 – 2709 mils |
1256 – 2252 mils |
I/O: 1931 – 2524 mils Transceivers: 2791 – 4083 mils |
I/O: 3253 – 3883 mils Transceivers: 3990 – 4975 mils |
|
Length Matching |
2036 – 2048 mills |
1801 – 2381 mills |
2707 – 2732 mills |
1381 – 2277 mills |
I/O: 2993 – 2995 mills Transceivers: 3169 – 4132 mills |
I/O: 3860 – 3908 mills Transceivers: 4256 – 4910 mills |
Schematic and Design Files
The BRK8350 schematics and design files are available in the Downloads section of the Pins website.
Mechanical Drawing
