BRK8350 Breakout Board

Unlike our integration modules, breakout boards are not intended for production integration. We reserve the right to change dimensions and functionality of this board at any time and may not necessarily have the previous version available for purchase.

Powering the BRK8350

The BRK8350 requires a clean, filtered, DC supply within the range of 6 V to 16 V. This supply may be delivered through the DC power connector (rated to 5 A max current) on the BRK8350 itself or the DC power connector on the XEM8350. Please refer to Powering the XEM8350 for information on the XEM8350 power systems.

Peripherals and Connectors

The table below summarizes the various connectors on the BRK8350. The XEM8350 Pin List has connection information in the “BRK8350” column. Additionally, please refer to the schematics and layout available online for detailed connection diagrams.

CONNECTOR TYPEREFDESFPGA BANK
SYZYGY StandardJ148
SYZYGY StandardJ247
SYZYGY StandardJ428
SYZYGY StandardJ524
SYZYGY Transceiver (TXR-4)J8GTH 226
SYZYGY Transceiver (TXR-4)J23GTH 225
U.FLJ15-16, J19-20GTH 126
SMAJ6-7, J9-14GTH 128
SMAJ24-25GTH 128 REFCLK0
SATAJ26-27GTH 128
QSFPQSFP1GTH 224
QSFPQSFP2GTH 227
M.2J32GTH 127

Clock Oscillator

CLOCKFREQUENCYMC PinsFPGA PINS (P / N)
MGT REFCLK1100 MHzMC3 17 / 19V32 / V33 (Bank 127)

A PCIE clock generator chip provides a synchronous 100Mhz Gen3 compatible clock to both the M.2 connector and the MGT REFCLK1.

On Rev FXX and previous, this clock was provided to the transceiver ref clock by a separate on-board 100-MHz oscillator.

SFP Transceiver Sockets

The BRK8350 has two QSFP cages installed, but the optical transceivers are optional. The following Finisar part is one example option.

MANUFACTURERPART NUMBERDIGI-KEY P/NAPPROXIMATE COST
FormericaTQS-Q14H9-J831785-1074-ND$212.80 / each

M.2 Socket

The M.2 connector (J32) is an M-keyed Socket 3 interface which supports SATA and PCIe-based SSD applications. The connector fits 22-mm wide modules. A positionable standoff is included for secure mounting of module types 2230, 2242, 2260, and 2280.

A PCIE clock generator chip provides a synchronous 100Mhz Gen3 compatible clock to both the M.2 connector (pins 53/55) and the MGT REFCLK1 (Bank 127 V32/V33).

On Rev FXX and previous, this clock was provided to the M.2 connector by a separate on-board 100-MHz MEMS oscillator.

SYZYGY Compatibility Table

Schematic and Design Files

The BRK8350 schematics and design files are available in the Downloads section of the Pins website.

Mechanical Drawing