Clock Generator

A Silicon Labs Si5341B programmable clock generator provides nine independent LVDS clock pairs to the FPGA. Two are connected to fabric for general reference, one is connected for DDR4 reference, and six are connected to transceiver reference clock inputs. The input reference for the Si5341B is a fixed-frequency 50-MHz crystal. A footprint for a crystal oscillator provides the option for an additional clock reference input. The output frequency of each channel has a range of 0.0001-350 MHz. See the Si5341B data sheet for more information on configuring this part.

The Si5341 Settings project provides a simple sample design that can interface between the Zynq UltraScale+ PS I2C and the Si5341B I2C interface. The Si5341 Settings project can be found in the ecm1900-tools open source repository here: https://github.com/opalkelly-opensource/ecm1900-tools.

Default Clock Settings

The attachment below is the Silicon Labs ClockBuilderPro project file used to configure the Si5341 on the ECM1900 for the default clock settings. This project can be used as a template for creating your own configuration data.

SI5341B OUTPUT PIN DEFAULT FREQUENCY FPGA PIN FPGA PIN NAME FPGA BANK
CLK0 (LVDS +) 125 MHz AD8 MGTREFCLK0P_223 223 (GTH)
CLK0B (LVDS -) AD7 MGTREFCLK0N_223
CLK1 (LVDS +) 125 MHz AB8 MGTREFCLK0P_224 224 (GTH)
CLK1B (LVDS -) AB7 MGTREFCLK0N_224
CLK2 (LVDS +) 125 MHz T27 PS_MGTREFCLK0P_505 505 (GTR)
CLK2B (LVDS -) T28 PS_MGTREFCLK0N_505
CLK3 (LVDS +) 100 MHz D15 IO_L11P_T1U_N8_GC_67 67
CLK3B (LVDS -) D14 IO_L11N_T1U_N9_GC_67
CLK4 (LVDS +) 100 MHz F22 IO_L11P_T1U_N8_GC_28 28
CLK4B (LVDS -) E22 IO_L11N_T1U_N9_GC_28
CLK5 (LVDS +) 100.04 MHz AJ9 IO_L12P_T1U_N10_GC_66 66 (DDR4)
CLK5B (LVDS -) AK9 IO_L12N_T1U_N11_GC_66
CLK6 (LVDS +) 125 MHz Y8 MGTREFCLK0P_225 225 (GTH)
CLK6B (LVDS -) Y7 MGTREFCLK0N_225
CLK7 (LVDS +) 125 MHz V8 MGTREFCLK0P_226 226 (GTH)
CLK7B (LVDS -) V7 MGTREFCLK0N_226
CLK8 (LVDS +) 125 MHz T8 MGTREFCLK0P_227 227 (GTH)
CLK8B (LVDS -) T7 MGTREFCLK0N_227

Configuration Interface

SI5341B PINFPGA PIN
SCLA28 (PS_MIO16)
SDAC29 (PS_MIO17)
I2C Address0b1110100