The SZG-MULTIDAQ is an analog instrumentation peripheral with 8 analog inputs and 8 analog outputs. It features a Texas Instruments ADS8688A 16-bit ADC and a Texas Instruments DAC80508 16-bit DAC. Spring loaded terminal blocks allow easy connection for input and output wires. This module is an excellent choice for analog input/output instrumentation and control needs.

• Aligni PLM – See the Attachments tab for schematics.
• SYZYGY Specification
• SYZYGY GitHub Site – Several projects that could be helpful.
• SZG-MULTIDAQ Example Design
• Product Page

Both the ADC and DAC components require and accurate and low noise 5V rail. To provide this from the available SYZYGY power rails, a 5.5V boost regulator is first used, followed by an ultra low noise 5V linear regulator to supply each analog component.

The SZG-MULTIDAQ is provided as a Standard SYZYGY port peripheral. The ADC and DAC utilize independent 4 wire SPI bus interfaces for data transfer and control. The data interface is level shifted from the SYZYGY ports VIO voltage to the 3.3V needed by the ADC and DAC interfaces so that a wide range of I/O voltages can be used. See the SYZYGY compatibility table below for the allowed VIO range.

^{ADC_RST is active high. When not driven, is not asserted.}

The ADC and DAC outputs are each connected to a 16 pin spring contact terminal block. Press down on the spring lever while inserting or removing wires from the block. Every other pin on each connector is Ground. J2 has the ADC analog output pins and J3 has the DAC analog input pins.

The source of the following pinout information is the SZG-MULTIDAQ schematic. This pinout follows the SYZYGY specification for Standard ports.

• Column PIN NUM (J1) lists the pin number on the SYZYGY specification’s Standard Samtec connector, this is reference designator J1 in the schematic.
• Column SIGNAL NAME lists the SYZYGY specification’s name for this pin’s connection.
• Column SCHEMATIC NET lists the net name found in the SZG-MULTIDAQ’s schematic for the connection.