Opal Kelly issues this PCN to existing customers of the listed product(s) to inform them of changes and/or updates that may affect current inventory or current and future applications of the product.

7 March 2024

The following items are affected by this PCN:

• SZG-PCIEX4

All SZG-PCIEX4 boards shipped on or after March 7, 2024 are affected by this change. All SZG-PCIEX4 boards shipped before March 7, 2024 are not affected by this change.

The SYZYGY DNA for the SZG-PCIEX4 was corrected to set the LVDS flag to false.

The SYZYGY DNA LVDS flag is for boards that use LVDS I/O standards. However the SZG-PCIEX4 uses transceiver standards, not LVDS. The LVDS flag should not be set on the SZG-PCIEX4.

The incorrect setting of the LVDS flag to true means that the SmartVIO voltage solution on carriers with the SZG-PCIEX4 installed will be more restrictive than required. An LVDS peripheral often requires specific I/O bank voltages for LVDS to function (depending on the specific carrier it is connected too). This means that the true LVDS flag will cause the SmartVIO solution to have a more limited range of possible voltage solutions than it should have.

The SZG-PCIEX4 has on board level shifters for the I/O control signals. These shifters mean that the control signals will still function correctly, even if the solution set of SmartVIO voltages is smaller. However, if there are any other SYZYGY peripherals on the same VIO rail, this issue may make it harder for a common voltage solution to be found for all peripherals.

In the case where a voltage solution can not be found between the SZG-PCIEX4 and other SYZYGY peripherals on the same VIO rail, but only because the true LVDS flag incorrectly limiting the solution set, the device settings can be used to override the SmartVIO solution. Take extra care to make sure that the voltage is within the acceptable range for all peripherals on the VIO rail.

Alternatively, the DNA on the SZG-PCIEX4 can be updated to the latest using the provided SYZYGY tools.