|Host Interface||USB 3.0 Type-C|
|FPGA Memory||2 GiByte DDR4 (32-bit wide data interface)|
|NV Memory (System)||16 MiB SPI Flash|
|NV Memory||32 MiB QSPI FPGA Flash (supports FPGA gateware boot)|
|Clocks||100 MHz and 125 MHz fixed oscillators|
|FPGA I/O||77 HP I/O (Banks 64, 67)|
72 HD I/O (Banks 84, 86, 87)
|FPGA MGT||12 GTY transceivers (16.375 Gb/s)|
|Dimensions||100mm x 70mm (3.94″ x 2.76″)|
|DC Input Ripple||–||–||50||mVp-p|
|Oscillator Frequency (DDR4/FPGA Fabric)||100||MHz|
|Oscillator Frequency (Transceivers)||125||MHz|
The XEM8310 PCB is 100mm x 70mm (3.94″ x 2.76″) with four mounting holes placed near the corners. These mounting holes are electrically isolated from all signals on the XEM8310. Power and USB Type C are located along one edge of the PCB. Three 80-pin expansion connectors are available on the bottom-side of the PCB.
Electrical schematics are provided in redacted form through Pins Downloads. You must be a registered customer to download these schematics. The FrontPanel SDK and related design details are proprietary and confidential. Schematics related to the implementation have been removed and are unavailable.
Visit Pins Downloads > FPGA Board Schematics > XEM8310-AU25P-REV-Schematic.pdf
The mechanical drawing below may be used for enclosure or mounting hardware design. 3D Models are also available in SolidWorks, STEP, and IGES formats.
Mating Board Diagram
Use the mating diagram below to orient and design peripheral mating hardware. Note that this is a top-down view and mates to the bottom of the XEM8310. This design is realized in Altium CAD drawings in the corresponding breakout board which are available through Pins Downloads.
For Samtec connector details, drawings, models, and landing patterns, please visit Samtec’s website.
An active (fan-based) heatsink is available as an add on to install on the FPGA for cooling. The fan enable can be controlled over the FrontPanel API. See the Device Settings documentation for more information.
The fansink is Radian part number FI27/1.3+Y+T725.