In addition to the power LED, there are four LEDs, each of which is controlled by FPGA pins as shown in the table below.

LEDFPGA PIN
D1U24
D2V19
D3T24
D4U19

The LED anodes are connected through a current limiting resistor to +3.3 V and the cathodes wired through NMOS transistors to the FPGA I/O on Bank 65. To turn ON an LED, the FPGA pin should be at logic ‘1’.  To turn OFF an LED, the FPGA pin should be at logic ‘0’.

Note: The LEDs are not dependent on VIO to function.