Opal Kelly issues this PCN to existing customers of the listed product(s) to inform them of changes and/or updates that may affect current inventory or current and future applications of the product.
31 March 2022
The following items are affected by this PCN:
PCB revisions EXX and later are affected by this PCN. Revisions DXX and earlier are not affected by this change. The PCB revision is indicated in silkscreen in the location shown below.
Revisions DXX and earlier are not affected. This includes date code 20171023 and earlier.
Revisions EXX and later are affected.
Reason for the Change
The PUDC_B pin on the Kintex-7 (pin B25, bank 14) controls the state of I/O pullups during startup (after power-up and during configuration). On revision EXX and earlier, the PUDC_B pin is pulled low, enabling I/O pullups during startup. This can cause unexpected behavior. For example, voltage sources connected to I/O pins with VREF functionality can become damaged when pulled to an incompatible voltage. On revision FXX and later, the PUDC_B pin is pulled high, disabling I/O pullups during startup.
Description of the Change
The resistors connected to the Kintex-7 PUDC_B pin are populated according to the table below.
|Reference||EXX (and earlier)||FXX (and later)|
|R66||not placed||1k (pullup to +1.8V)|
|R68||1k (pulldown to ground)||not placed|
To change the default startup behavior of your device, please see PUDC_B Configuration for information on modifying the default PUDC_B pull-up/pull-down resistor configuration.