Clock Oscillators

Note: The clocks described here are separate and not synchronous to the clock provided by the USB host interface.

General (Fabric) Reference

A fixed-frequency, 200 MHz, low-jitter oscillator is included on-board and outputs LVDS to the FPGA on bank 34. The Kintex-7 FPGA can produce a wide range of clock frequencies using the on-chip DCM and PLL capabilities. An external termination resistor is provided for this clock so internal termination is not necessary.

200 MHZ PIN	FPGA PIN
LVDS +	AB11
LVDS –	AC11

Transceiver Reference

A second 100 MHz oscillator is available to the transceiver portions of the FPGA as a reference.

100 MHZ PIN	FPGA PIN
LVDS +	K6
LVDS –	K5