The Kintex UltraScale+ FPGA supports design security using AES decryption logic and provides two methods for encryption key memory storage. The first is a volatile memory storage supported by an external battery backup supply voltage (VBATT). The second is a one-time programmable eFUSE register. The XEM8370 design supports both types of key storage.

The VBATT pin is connected directly to mezzanine header MC2 pin 13. Providing an external voltage to this pin will preserve the contents of the FPGA’s volatile key storage so long as VBATT remains over the threshold specified in the Kintex UltraScale+ documentation. Please see the AMD UltraScale Architecture Configuration User Guide (UG570) for more details.

By default the VBATT pin is connected to ground via R91. This resistor must be removed to supply an external VBATT voltage.

Non-volatile storage of the encryption key is also possible by programming the Kintex UltraScale+ eFUSE register via JTAG. Please see the AMD UltraScale Architecture Configuration User Guide (UG570) for more details.