In addition to the power indicator LEDs, there are four general-purpose, bi-color red/green LEDs, each of which is controlled by FPGA pins as shown in the table below.

The LED anodes are connected through a current limiting resistor to +3.3 V and the cathodes are wired through NMOS transistors to the FPGA I/O on Bank 86. To turn ON an LED, the FPGA pin should be at logic ‘1’.  To turn OFF an LED, the FPGA pin should be at logic ‘0’.

Bank 86 is powered by VIO2 which is shared with SYZYGY port C. The LEDs appear to the SmartVIO controller as an onboard SYZYGY peripheral with compatible VIO voltage range of 1.8V to 3.3V. The NMOS transistors effectively provide voltage level translation, allowing the LEDs to work with any VIO2 voltage supported by the SZG-HUB1450. VIO2 must remain active for the LEDs to function, and it is enabled by default at power up. VIO2 will become inactive if it is disabled in Device Settings or if a SYZYGY peripheral is attached to port C which is not compatible with VIO2’s output voltage range.