Introduction
The SZG-HUB1450 is a compact FPGA development board featuring an AMD Artix UltraScale+ FPGA, a 10Gbps USB 3 host interface, 1 GiB DDR4 SDRAM, and three standard SYZYGY ports with SmartVIO capability. The SYZYGY ports provide expansion capabilities with external peripherals for data acquisition, signal generation, digital communication, sensing, networking, advanced interfacing, and more.

Documentation and Reference Materials
The following is a comprehensive list of documentation available for this device.
| SZG-HUB1450 User’s Manual | This online documentation space. |
| SZG-HUB1450 Pins Reference | The interactive Pins reference for the device provides detailed pinout information as well as automated constraint file generation. Export functionality is provided to PDF, CSV. Constraint files are provided in XDC format for use in Vivado. |
| SYZYGY Specification | Further information and specification standard for SYZYGY ports. |
| SYZYGY GitHub | Open source SYZYGY tools and peripheral PCB template design files. |
| FrontPanel SDK User’s Manual | The online documentation space for the FrontPanel SDK. |
| FrontPanel API Reference | Online API reference with detailed usage for every API method. |
Functional Block Diagram

FPGA
The SZG-HUB1450 is offered in a single variant with the AU10P density and -1 speed grade Artix UltraScale+ FPGA. The table below briefly summarizes the key features of this FPGA. Please consult the AMD documentation for a more thorough description.
| FEATURE | XEM8320-AU25p |
|---|---|
| FPGA | XCAU10P-1FFVB676E |
| System Logic Cells | 96,000 |
| CLB Flip-Flops | 88,000 |
| CLB LUTs | 44,000 |
| Max. Distributed RAM | 1.0 Mb |
| Block RAM | 100 blocks (3.5 Mb) |
| DSP Slices | 400 |
| CMTs (1 MMCM + 2 PLLs) | 3 |
| Max I/O | 51 HP + 45 HD (See SZG-HUB1450 SYZYGY Ports for pin mapping) |
10Gbps SuperSpeed USB 3 Interface
The SZG-HUB1450 uses the Infineon FX10 USB microcontroller to operate as a 10Gbps SuperSpeed USB (USB 3.2 Gen 2×1) peripheral. As a USB peripheral, the SZG-HUB1450 is instantly recognized as a plug-and-play peripheral on millions of PCs. More importantly, FPGA downloads to the SZG-HUB1450 happen quickly, virtual instruments under FrontPanel update quickly, and data transfers are blazingly fast.
On-board Peripherals
The SZG-HUB1450 is designed to compactly support a large number of applications with a small number of on-board peripherals. These peripherals are listed below.
Low-Jitter MEMS Oscillator
The following fixed-frequency, low-jitter clock oscillator is included on-board with direct connection to a global clock input on the FPGA:
- 156.25 MHz for FPGA fabric and DDR4 memory operations
1-GiByte Word-Wide DDR4 Synchronous DRAM
The module also includes 1-GiByte DDR4 SDRAM with a 16-bit wide interface to the FPGA. This SDRAM is attached exclusively to the FPGA. The maximum data rate of the SDRAM interface of the -1 speed grade Artix UltraScale+ (single rank component) is limited to 2133 Mb/s. This gives a supported peak memory bandwidth of 34.128 Gb/s.
Shared FPGA and System Flash – 256 MiB QPSI Flash Memory
A 256 Mbit serial flash provides on-board non-volatile storage for the HUB1450. Power on FPGA configurations can be stored in this flash space, as well as any necessary application data. Erase, read, and write functions are available at all times (with or without a configured FPGA) through the use of FrontPanel API methods. Flash data, such as calibration settings, can be passed to the FPGA via the API.
LEDs
Four bi-color red/green LEDs are available for general use as indicators.
SYZYGY Expansion Connectors
Three standard SYZYGY ports are available for high-performance peripheral expansion. For more details, please review the SYZYGY Specification. Additional details for these ports are available in the SZG-HUB1450 SYZYGY Ports documentation.
| SZG-HUB1450 PORT | SYZYGY TYPE | SmartVIO Power Group |
|---|---|---|
| PORT A | Standard | VIO1 |
| PORT B | Standard | VIO1 |
| PORT C | Standard | VIO2 |
SmartVIO Support
All three ports fully support the SmartVIO feature required by the SYZYGY specification. SmartVIO allows each port to automatically negotiate and supply the correct VCCO voltage to connected peripherals, eliminating the need for manual voltage configuration or hardware modifications. This means you can connect SYZYGY-compliant modules operating at different I/O voltages — whether 1.2V, 1.8V, 2.5V, or 3.3V — and the SZG-HUB1450 will adjust each group’s voltage rail to match. The result is true plug-and-play compatibility across the SYZYGY ecosystem, reducing integration time and protecting both carrier and peripheral hardware from voltage mismatches.
FrontPanel Support
The SZG-HUB1450 is fully supported by Opal Kelly’s FrontPanel SDK and the FrontPanel PlatformFrontPanel Platform, Opal Kelly’s development and deployment environment for building rich, fully-featured device interfaces. Using JavaScript, TypeScript, and the full Chromium ecosystem, FrontPanel lets you create high-performance modern graphical user interfaces quickly and with the tools you already know.
Building instrumentation interfaces is straightforward — draw on the enormous ecosystem of web components, UI libraries, and visualization plugins to assemble exactly the interface your application needs.
Together, FrontPanel gives you a complete path from first prototype to polished deployment.
Programmer’s Interface
In addition to complete support within the FrontPanel Platform, the SZG-HUB1450 is also fully supported by the FrontPanel SDK, a powerful C++ class library available to Windows, Mac OS X, and Linux programmers allowing you to easily interface your own software to the device.
Although C++ offers the highest performance, wrappers have been written for C#, Java, and Python making the API available under those languages as well. Sample wrappers (unsupported) are also provided for Matlab and LabVIEW.
Complete documentation and several sample programs are installed with FrontPanel.
Copyright
Software, documentation, samples, and related materials are Copyright © 2006-2026 Opal Kelly Incorporated.
Opal Kelly Incorporated
Portland, OR
https://www.opalkelly.com
All rights reserved. Unauthorized duplication, in whole or part, of this document by any means except for brief excerpts in published reviews is prohibited without the express written permission of Opal Kelly Incorporated.
Opal Kelly® and FrontPanel® are registered trademarks of Opal Kelly Incorporated. Linux is a registered trademark of Linus Torvalds. Microsoft and Windows are both registered trademarks of Microsoft Corporation. All other trademarks referenced herein are the property of their respective owners and no trademark rights are claimed.