Design Guide

This reference is provided to help guide you through the design process of a mating peripheral to the XEM7350. It is not intended to be a comprehensive instruction manual. While we put forth great effort to reduce the effort required to build an FPGA-enabled platform, there are hundreds of pages of product documentation from Xilinx that should be considered. Use this guide as a roadmap and starting point for your design effort.

Useful References

Electrical Design Guide

Input Power Supply Connection

Input power to the XEM7350 must be applied through the DC barrel jack. For information on the barrel jack dimensions and polarity, see Powering the XEM7350. For information on FMC connector pin assignments, see the XEM7350 Pins Reference.

Total Power Budget

The total operating power budget is an important system consideration. The power budget for the XEM7350 is highly dependent on the FPGA’s operating parameters and this can only be determined in the context of an actual target design.

The onboard XEM7350 power supply regulators provide power for all on-board systems, including the VIO rails provided to the FMC connector. The Power Budget table on the Powering the XEM7350 page indicates the total current available for each supply rail. This table may be used to estimate the total amount of input power required for your design.

FPGA External VREF Pins

The XEM7350 applies an external voltage reference to pins AD3, W4, AE11, and W8. for applications using DDR3 memory. When the memory is not used in a design, these pins must set to high impedance. Not doing this can lead to contention between these multi-function IO pins and the VREF supply.

FPGA I/O Bank Selection and I/O Standard

Details on the available standards can be found in the following Xilinx documentation:

FPGA I/O Bank Selection and Voltage

Voltage supply rail VADJ powers the FPGA I/O banks on the FMC connector. For information on configuring this voltage using FrontPanel, see the Device Settings page. See the XEM7350 Pins Reference for details about FPGA bank power assignments.

Mechanical Design Guide

FMC Connector Placement

Refer to the VITA 57 FMC Standard for information on FMC connector placement and mechanical mounting design.

Confirm the Connector Footprint

For recommended PCB layout of the Samtec ASP connector, refer to Samtec ASP-134488-01 drawing.

Confirm Mounting Hole Locations

Refer to the XEM7350 Specifications for a comprehensive mechanical drawing.

Confirm Other Mechanical Placements

Refer to the XEM7350 mechanical drawing for locations of the USB jack and the DC power jack. This drawing is available on the Specifications page of the XEM7350 documentation.

Thermal Dissipation Requirements

Thermal dissipation for the XEM7350 is highly dependent on the FPGA’s operating parameters and this can only be determined in the context of an actual target design.

An active FPGA cooling solution is recommended for any design with high power consumption. Opal Kelly provides an optional fansink designed to clip onto the XEM7350. See the Powering the XEM7350 page for more information. Some designs may require a different cooling solution. Thermal analysis and simulation may be required.