Artix-7 devices support external, high-performance memory through the use of the Memory Interface Generator (MIG) provided by Xilinx. MIG produces a custom memory interface core that may be included in your design. These parameters have been used successfully within Opal Kelly but your design needs may require deviations.
All settings are based on MIG 4.0 and Vivado 2016.2.
PHY to Controller Clock Ratio
Input Clock Period
Read Burst Type and Length
Sequential – 8
Output Driver Impedance Control
Controller Chip Select Pin
RTT (nominal) – On Die Termination (ODT)
Memory Address Mapping
BANK | ROW | COLUMN
Use System Clock
System Reset Polarity
Debug Signals for Memory Controller
IO Power Reduction
Internal Termination Impedance
sys_clk_p/n Bank Number
sys_clk_p/n Pin Number
Rtt WR – Dynamic ODT
Dynamic ODT off
Opal Kelly Incorporated, located in Portland Oregon, provides a range of powerful USB and PCI Express FPGA modules that deliver the critical interconnection between a PC and many electronic devices.
Since 2004, the use of Opal Kelly modules has spread throughout the world – from University research labs and classrooms to some of the largest global commercial firms (and some of the very smallest).
Using Opal Kelly modules, design engineers, college professors, students, researchers, and hobbyists have all been relieved of the time, expense, and reliability concerns of inventing their own PC interconnection.
With extensive expertise in FPGA technology, hardware design, software programming, and embedded systems, Opal Kelly is aware of the problems facing engineers today and is committed to providing solutions that fill the time and expertise gap for efficient interconnect functionality, allowing development teams to focus on core competencies, thereby reducing overall design time and expense and accelerating time-to-market.