Low-Jitter 100 MHz Oscillator

A fixed-frequency, 100 MHz, low-jitter oscillator is included on-board and outputs LVDS to the FPGA.  The Spartan-6 FPGA can produce a wide range of clock frequencies using the on-chip DCM and PLL capabilities. The pin mappings are as follows:

OSCILLATOR PINFPGA PIN
LVDS_PY11
LVDS_NAB11

Note: This clock is separate and not synchronous to the clock provided by the USB host interface.