The AXI HDL and okHost gateware changelog records okHost’s AXI behavior and its encrypted synthesis and simulation sources. okHost ships in the FrontPanel SDK, so the gateware version and the SDK version are one and the same, and entries are keyed to the SDK release version.

Entries start at v6.1, the first SDK release to include the okHost AXI and HUB gateware. Earlier 6.0 and 5.x releases predate the AXI gateware and are out of scope.

The FrontPanel SDK release notes are a related, largely-software history, and a gateware-relevant change may appear there as well as here. The IP Core changelog covers changes to the FrontPanel Vivado IP Core itself, such as its configuration GUI. The map from an IP Core version to the SDK and gateware version it embeds is on the IP Core Compatibility page, which pure SDK users do not need.

okHost AXI HDL v6.1 (release date to be confirmed)

• Initial release of the okHost AXI gateware: the AXI-Lite, AXI-Full, and AXI-Stream host interfaces. First board: SZG-HUB1450-AU10P.

The FrontPanel SDK delivers okHost as raw source files with no IP packaging; you add them to your Vivado project. The FrontPanel Vivado IP Core is an alternative delivery of the same gateware that you add through the Vivado IP catalog or a Block Design; see Choosing Your Path.

The encrypted synthesis sources are delivered as a set of files, organized by board, Vivado key-year, and bandwidth mode, at <FrontPanel HDL>/<Board>/Vivado-<year>/BWMode<N>/:

• okHost.vp is the encrypted IEEE-1735 synthesis netlist, which is not human-readable.
• okHost.veo is the instantiation template; see Instantiation Parameters.
• okHost.xdc is the constraints file. It is import-only; do not edit it. Board-specific handling such as PROCESSING_ORDER is a project setting rather than an edit, as under Board-Specific Build Notes.

The sources are IEEE-1735 encrypted, so AMD Vivado is the only synthesis tool that can build them. Which BWMode<N> folders ship is board- and speed-grade-dependent, and each board supports a subset. The bandwidth modes themselves are a USB transport feature, on Bandwidth Modes. The Vivado-<year> level is the encryption key-year; choose the folder whose year covers the Vivado release you build with, as under Vivado Version Compatibility below.

The simulation Verilog BFM ships separately, in the FrontPanel Platform install at <FrontPanel Platform>\Simulation\USB3.2\Vivado-<year>\:

• okHost.vp is the encrypted IEEE-1735 simulation model, which is not human-readable. It shares its name with the synthesis netlist above but is a separate file, delivered under Simulation.
• okHost.veo is the instantiation template. It carries the SIM_BWMODE parameter and a legend of the per-mode data widths, because the model’s width parameters are derived from SIM_BWMODE rather than written out on each port.

The BFM is encrypted and organized by key-year on the same terms as the synthesis sources above, so use the folder whose year covers the Vivado release you simulate with, as under Vivado Version Compatibility below. How to use it is on Simulation. The SIM_BWMODE parameter on the synthesis instance is a simulation-only parameter, covered under Instantiation Parameters.

Vivado can encrypt HDL only under a public key tied to a year that stays valid for a fixed window of about six years, so the sources are organized by key-year, the Vivado-<year> folder under Delivery and Files above. With the SDK sources, use the key-year folder whose window covers the Vivado release you build with. The IP Core selects it for you. The simulation BFM is encrypted under the same key-year scheme, so pick its folder the same way, against the Vivado release you simulate with.

To span more than one window, we issue a new key-year before the old one closes and keep two overlapping in rotation. Each board advertises the supported Vivado range its key-year or key-years produce, and any in-range release is expected to work on a best-effort basis. Currently these boards advertise Vivado v2021.1 through v2027.1 and ship a single key-year (Vivado-2021), with the next (2027) rotating in soon.

The per-board supported-Vivado list is on the IP Core Compatibility page.

The okHost gateware includes third-party HDL components under the open-source licenses below.

• AXI4 infrastructure: MIT License, Copyright (c) 2018 Alex Forencich.
• AXI4-Stream infrastructure: MIT License, Copyright (c) 2014-2018 Alex Forencich.

Both are under the MIT License:

A third component is under the BSD 2-Clause License, Copyright (c) 2013, Joachim Strömbergson. All rights reserved: