On-Board Flash Memory

System Flash

The Flash memory attached to the USB microcontroller stores device firmware and settings as well as user data that is accessible via the FrontPanel API.  The API includes three methods for accessing this memory: FlashEraseSectorFlashWrite, and FlashRead.  Please refer to the FrontPanel SDK User’s Manual and the FrontPanel API Reference for information about applying these methods.


The Numonyx N25Q128A11B1240E is a 16 MiB Flash memory arranged into 256 64-kiB sectors.  Each sector contains 256 256-byte pages.  Sectors 0…15 are reserved for device firmware and settings and are not accessible to user software.  The remaining 15 MiB may be erased, written, and read using the FrontPanel API at any time even without a valid FPGA configuration.  Full 64 kiB sectors must be erased at a time.  However, contents may be read or written on any page address boundary.

Loading a Power-On FPGA Configuration

The user-area in System Flash may be used to store an Altera raw bit file (rbf) to configure the FPGA at power-on using USB 3.0 Reset Profiles.  Power-on configuration takes approximately 6-10 seconds from when power is applied.  A full Reset Profile may also be performed after configuration. Programming and setup of the system flash for power-on FPGA configuration may be done using the API or the FrontPanel Flash Programming Tool.

To build this functionality into your application, the API is used to erase and program the power-on bitfile. The Flashloader sample is provided to perform these steps from a simple command-line utility.  Source code to the Flashloader sample is included with the FrontPanel SDK. Called with a single argument (the filename for a valid Xilinx bitfile), the Flashloader sample will erase the first sectors in the System Flash user-area, then write the bitfile. It will also setup the Boot Reset Profile to point to this area on power-on.

No Power-On Configuration

Called with no arguments, the Flashloader sample will clear the existing Boot Reset Profile.  This has the effect of preventing an FPGA configuration from being loaded at power-on.  This functionality may also be accomplished from the API by setting an empty okTFPGAResetProfile using the API SetFPGAResetProfile.  See the FrontPanel API Reference for details.