There are four LEDs on the ZEM5305 in addition to the power LED. Each is wired directly to the FPGA as shown in the table below.
The LED anodes are connected to a pull-up resistor to +3.3VDD and the cathodes wired directly to the FPGA on Bank 7A with a bank I/O voltage of 1.35 V. To turn ON an LED, the FPGA pin should be at logic ‘0’. To turn OFF an LED, the FPGA pin should be tri-stated. This will prevent damage to the FPGA I/O pins that are setup for a low output voltage due to the DDR3 I/O standard restriction.