Gigabit Transceivers
The SYZYGY Transceiver port offers two channels of high speed transceiver lanes connected to the Zynq 7000 GTP transceiver pins on the Brain-1.
IBERT Configuration
Xilinx provides the IBERT tool to test and experiment with gigabit transceivers. The settings below are compatible with the SYZYGY Brain-1 using Vivado 2017.3:
PROTOCOL DEFINITION | |
---|---|
Silicon Version | |
Protocol | Custom 1 |
Line Rate | 3.75 Gbps |
Data Width | 32 |
Ref Clk | 125.000 MHz |
Quad Count | 1 |
PLL Used | PLL0 |
PROTOCOL SELECTION | |
GTP Location | QUAD_112 |
Protocol Selected | Custom 1 / 3.75 Gbps |
Refclk Selection | MGTREFCLK0 112 |
TXUSRCLK Source | Channel 0 |
CLOCK SETTINGS | |
Clock Type | System Clock |
Source | QUAD112 0 |
Frequency (MHz) | 125.0 |
Gigabit Transceiver IBERT Performance
Xilinx’s IBERT tool enables an automated self-measurement of a GTP channel’s eye diagram when used in a loopback mode. Eye diagrams for three different speeds were captured using this tool with a simple loopback peripheral attached to the expansion headers. While results may vary, these are typical captures and actually represent the worst case capture over all channels for the respective rates.
Note that in loopback modes, it can be helpful to disable the GBT DFE (decision feedback equalizer) to avoid over-compensation. In these test cases, the DFE has been left enabled.