The Artix-7 FPGA supports design security using AES decryption logic and provides two methods for encryption key memory storage.  The first is a volatile memory storage supported by an external battery backup supply voltage (Vbatt).  The second is a one-time programmable eFUSE register.  The XEM7310 design supports both types of key storage with user-modification required for Vbatt support.

For quantity purchases of 50 or more units, please contact Opal Kelly ([email protected]) to discuss factory installation of these components.

A small lithium rechargeable battery and three support components can be installed to provide Vbatt to the FPGA when the XEM is unpowered.  This will preserve the contents of the FPGA’s volatile key storage so long as Vbatt remains over the threshold specified in the Artix-7 documentation.  Please see the Xilinx 7-Series FPGA’s Configuration (UG470) for more details.

The applicable schematic section and components required to support this functionality are shown below. By default the VBATT FPGA pin E12 is pulled to ground with a 0R ohm resistor. That resistor (R89) will need to be removed, and the rest of the listed components installed on the XEM7310 if Vbatt power functionality is required.

Non-volatile storage of the encryption key is also possible by programming the Artix-7 eFUSE register via JTAG.  Please see the Xilinx 7-Series FPGAs Configuration (UG470) for more details.