The Artix-7 FPGA supports design security using AES decryption logic and provides two methods for encryption key memory storage. The first is a volatile memory storage supported by an external battery backup supply voltage (Vbatt). The second is a one-time programmable eFUSE register. The XEM7310MT design supports both types of key storage with user-modification required for Vbatt support.
For quantity purchases of 50 or more units, please contact Opal Kelly ([email protected]) to discuss factory installation of these components.
Volatile Encryption Key Storage (Vbatt)
A small lithium rechargeable battery and three support components can be installed to provide Vbatt to the FPGA when the XEM7310MT is unpowered. This will preserve the contents of the FPGA’s volatile key storage so long as Vbatt remains over the threshold specified in the Artix-7 documentation. Please see the Xilinx 7-Series FPGA’s Configuration (UG470) for more details.
The applicable schematic section and components required to support this functionality are shown below. When placing the battery and LDO circuit, R89 must be removed from the board.
|BT1||Seiko Instruments||MS412FE-FL26E||3-V, 1-mAh lithium battery|
|D11||Micro Commercial||BAS40-04-TP||Schottky Diode, SOT23|
|R87||Generic||2.0 kΩ, 1%, SM-0402||Current limiting resistor|
|U20||Texas Instruments||TPS78318DDCR||LDO, 1.8-V output, 150 mA|
|C118, C119||Generic||1 μF, 10%, SM-040||Input/output capacitors for LDO|
Non-Volatile Encryption Key Storage (eFUSE)
Non-volatile storage of the encryption key is also possible by programming the Artix-7 eFUSE register via JTAG. Please see the Xilinx 7-Series FPGAs Configuration (UG470) for more details.