Documentation Portal / ZEM5305 / Clock Oscillator
ZEM5305

Clock Oscillator

A fixed-frequency 100 MHz low-jitter oscillator is available on-board and outputs LVDS to the FPGA on bank 7A. The FPGA can produce a wide range of clock frequencies using the on-chip PLL capabilities.

100 MHZ PINFPGA PIN
LVDS +H10
LVDS –G11

Note: This clock is separate and not synchronous to the clock provided by the USB host interface.