LEDs

There are four LEDs on the module.  The cathode of each is wired directly to the FPGA as shown in the table below.

The LED anodes are connected to a pull-up resistor to +2.5VDD and the cathodes wired directly to the FPGA. To turn ON an LED, the FPGA pin should be brought low. To turn OFF an LED, the FPGA pin should be tri-stated to avoid damage to the FPGA Bank 7A I/O which are tied to +1.35VDD for the DDR3 interface.

The following constraints are required to use the LEDs when using the Hard Memory Controller available on the Cyclone V since the pins share the same bank:

set_instance_assignment -name IO_STANDARD "1.35 V" -to led[3]
set_instance_assignment -name IO_STANDARD "1.35 V" -to led[2]
set_instance_assignment -name IO_STANDARD "1.35 V" -to led[1]
set_instance_assignment -name IO_STANDARD "1.35 V" -to led[0]
set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITHOUT CALIBRATION" -to led[3]
set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITHOUT CALIBRATION" -to led[2]
set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITHOUT CALIBRATION" -to led[1]
set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITHOUT CALIBRATION" -to led[0]Code language: Verilog (verilog)

More information about why these constraints are required can be found here: https://www.altera.com/support/support-resources/knowledge-base/solutions/rd01292013_881.html.