The JTAG connections on the FPGA are wired directly to the edge connector on the FOMD-ACV to facilitate FPGA configuration and ChipScope usage using a compatible JTAG cable. The JTAG interface presented at the edge connector is referenced to VCCPD1 as the JTAG I/O voltage. An appropriate connector (such as an Altera JTAG connector compatible with the Terasic JTAG cable) would need to be wired on the board hosting the FOMD-ACV. The BRKD-ACV has this connector and may be used as a reference.
See the FOMD-ACV Pins Reference for pin mapping information.