A 128 Mib (16 MiB) serial flash device (Micron MT25QL128ABA8E12-0SIT or equivalent) provides on-board non-volatile storage for an FPGA configuration bitstream. This device is attached directly to the FPGA configuration pins and not the FPGA fabric.

The SPI Flash is connected to the FPGA’s programming section and is therefore not available to the FPGA fabric as normal pins are. However, your design may access this device using the Altera Serial Flash Loader IP Core. Please see the Altera Cyclone V documentation for more details.

To program the SPI Flash that is connected to the FPGAs active serial port you must first generate a JTAG indirect configuration file which contains information about the bitfile to be loaded as well as the type of SPI flash being used.

• From the File menu in Quartus Prime, select “Convert Programming File”
• Change the Programming file type to “JTAG Indirect Configuration File”
• Select the “EPCQ128” configuration device and “Active Serial” mode
• Enter an ouptut file name
• In the “Input files to convert section:
  • Click on “SOF Data” and select “Add File…” then select the sof file for your current project (the project must have already gone through the assembler to create this file)
  • Click on “Flash Loader” and select “Add Device…” then select the device you are currently using (Cyclone V/5CEFA4 for the FOMD-ACV-A4)
• Click Generate and close the window after the file is successfully generated

Using the JTAG Indirect Configuration File generated above it is possible to program the SPI flash through the FPGA using the Altera Serial Flash Loader.

• Connect the USB Blaster JTAG cable to the JTAG port on the breakout board
• Open the Quartus Prime Programmer by selecting “Programmer” from the Quartus Prime tools menu
• Select “Add File” from the left hand side of the window and then navigate to and select the file generated previously
• Check the boxes under “Program/Configure” and “Verify” next to the file created previously
• The “Program/Configure” box next to the 5CEFA4 device should also be checked and the top file name replaced with “Factory default enhanced SFL image”
• Select “Start” on the left hand side of the window to start the programming/verification process, this may take some time
• Restart the board by cycling power to confirm that the FPGA configuration was programmed successfully. Note that you’ll need to ensure that the FPGA mode select pins are in the correct position to enable active serial configuration.

More information on the Serial Flash Loader IP core can be found in AN 370 from Altera.