Powering the XEM7320

The XEM7320 requires a clean, filtered, DC supply within the range of 4.5 V to 18 V.  This supply must be delivered through the DC power connector.

The XEM7320 power distribution system includes several supplies designed to provide suitable, efficient power for several systems and modules. A schematic diagram of the system follows, with input (+VDC) shown to the left and accessible supply rails shown to the right.

Supply Heat Dissipation (IMPORTANT!!)

Due to the limited area available on the small form-factor of the XEM7320 and the density of logic provided, heat dissipation may be a concern.  This depends entirely on the end application and cannot be predicted in advance by Opal Kelly.  Heat sinks may be required on any of the devices on the XEM7320.  Of primary focus should be the FPGA (U9) and SDRAM (U11, U14).  Although the switching supplies are high-efficiency, they are very compact and consume a small amount of PCB area for the current they can provide.

If you plan to put the XEM7320 in an enclosure, be sure to consider heat dissipation in your design.

Power Supply

The XEM7320 is designed to be operated from a single DC power source supplied through the DC power jack on the device. The input range of this supply must be a clean, well-regulated supply between +5VDC to +18VDC. This provides power for the several high-efficiency switching regulators on-board to provide multiple DC voltages for various components on the device as well as three adjustable supplies for the peripheral.

DC Power Connector

The DC power connector on the XEM7320 is part number PJ-102AH from CUI, Inc.  It is a standard “canon-style” 2.1mm / 5.5mm jack.  The outer ring is connected to DGND.  The center pin is connected to +VDC.

Powering via USB

The XEM7320 is not designed or intended to be operated from USB power. USB 3.0 power specifications cannot meet the inrush demands of the XEM7320.

Over Voltage Protection

The power distribution system on the XEM7320 includes over-current protection (OCP), over-voltage protection (OVP), over-temperature protection (OTP), and under-voltage lockout (UVLO). There is no fault indicator on the XEM7320. If any of these protections are tripped, you may need to power cycle the module. Note that each switching output has a separate OVP, OCP, and UVP system that operate independently.

The table below indicates the overvoltage and undervoltage thresholds. The fault state clears automatically when the +VDC input voltage is within the specified range.

Overvoltage5.56 V5.12 V
Undervoltage3.97 V3.69 V

Current Overload

The fuse has an overcurrent limit of approximately 5 A. A current overload condition does not cause the fuse to enter the fault state. Instead, the fuse enters a current limit mode, dissipating power internally to keep the output current at or below the 5 A limit. If the current overload condition continues and the thermal shutdown threshold is reached, the fuse enters the fault state. An automatic retry cycle will clear the fault state when the thermal overload condition no longer exists.

Reverse Voltage

The fuse protects against a reverse voltage/current condition, but the FAULT LED does not illuminate during this condition.

Power Budget

The table below can help you determine your power budget for each supply rail on the XEM7320.  All values are highly dependent on the application, speed, usage, and so on.  Entries we have made are based on typical values presented in component datasheets or approximations based on Xilinx power estimator results.  Shaded boxes represent unconnected rails to a particular component.  Empty boxes represent data that the user must provide based on power estimates.

The user may also need to adjust parameters we have already estimated (such as FPGA Vcco values) where appropriate. All values are shown in milliwatts (mW).

200 MHz, Misc250
FPGA Vccint, Vccbram 
FPGA Vccaux  
FPGA Vcco15,16 (DDR3), est.280
FPGA Vcco14 (USB), est.60
FPGA Vcco (User I/O)    
Total (mW)    
Available (mW)3,0002,2502,7004,950

Example XEM7320-A200 FPGA Power Consumption

Xilinx Power Estimator version 2015.3 was used to compute the following power estimates for the Vccint supply. These are simply estimates; your design requirements may vary considerably. The numbers below indicate approximately 80% utilization.

Clock150 MHz GCLK, 220,000 fanout570 mW
Logic (DFF)150 MHz, 220,000 DFFs550 mW
Logic (LUT)150 MHz, 100,000550 mW
BRAM36-bit, 300 @ 150 MHz450 mW
DSP150 MHz, 630 slices300 mW
Misc.DCM, PLL, etc.10 mW500 mW
Total2,430 mW500 mW
Available3,000 mW2,700 mW