To use a trigger to initiate an event, check for the trigger in a block synchronized with the clock on which the trigger is operating. The triggers in okTrigger[In|Out] are active high. You do not need to instantiate a new okTrigger[In|Out] for each trigger bit, since each bit can be triggered separately using its unique FrontPanel endpoint address. In the following example, reset and count are dependent on two separate triggers located in the same instance of okTriggerIn, and are triggered separately by passing different values to the same address in ActivateTriggerIn().

The pauses in the example are included to make the LEDs readable and are not required for the triggers to operate properly.

Note: This section contains both software and HDL portions. The software and HDL must work in tandem if FrontPanel is to be used on the PC end to perform tasks on the FPGA. The HDL in this section is designed to be set within the FrontPanel Framework HDL, available on the HDL Framework page for USB 2.0 and USB 3.0. For specific information about each of these methods or modules, consult the FrontPanel User’s Manual, the FrontPanel API guide, and the samples and README files provided with the FrontPanel download.

C/C++

okCFrontPanel dev; okCFrontPanel.ErrorCode error; dev.OpenBySerial(); error = dev.ConfigureFPGA("example.bit"); // Reset the counter dev.ActivateTriggerIn(0x41, 0); for (int i=0; i<20; i++) { // Trigger the state machine dev.ActivateTriggerIn(0x41, 1); std::this_thread::sleep_for(std::chrono::milliseconds(100)); }
Code language: PHP (php)

C#

okCFrontPanel dev = new okCFrontPanel(); okCFrontPanel.ErrorCode error = new okCFrontPanel.ErrorCode(); dev.OpenBySerial(""); error = dev.ConfigureFPGA("countingx.bit"); //Reset the counter dev.ActivateTriggerIn(0x41, 0); while(true){ // Trigger the state machine dev.ActivateTriggerIn(0x41, 1); Thread.Sleep(1000); }
Code language: JavaScript (javascript)

Python

dev = ok.okCFrontPanel() dev.OpenBySerial("") error = dev.ConfigureFPGA("countingx.bit") # Reset the counter dev.ActivateTriggerIn(0x41, 0) while 1 == 1: # Trigger the state machine dev.ActivateTriggerIn(0x41, 1) time.sleep(0.1)
Code language: PHP (php)

Java

public class example{ okCFrontPanel dev; okCFrontPanel.ErrorCode error; int i; Thread t; public void Initialize(){ t = new Thread(); dev = new okCFrontPanel(); dev.OpenBySerial(""); error = dev.ConfigureFPGA("countingx.bit"); // It’s a good idea to check for errors here! // Reset the counter dev.ActivateTriggerIn(0x41, 0); } public void Count(){ for(i = 0; i < 20; i++){ // Trigger the state machine dev.ActivateTriggerIn(0x41, 1); // Count by 1 try{ Thread.sleep(1000); } catch(Exception e){ System.out.println(e); } } } }
Code language: PHP (php)

Verilog

// Wire declarations wire done; // Circuit behavior assign led = ~count[7:0]; //set up counter always @ (posedge clk1) begin if (triggers[0]) begin count <= 8'h00; end else if (triggers[1]) begin count <= count + 1; end end // FrontPanel endpoint instantiation okTriggerIn tcount( .ok1(ok1), .ep_addr(8'h41), .ep_clk(clk1), .ep_trigger(triggers) );
Code language: PHP (php)

VHDL

--Wire declarations signal count : STD_LOGIC_VECTOR(7 downto 0); signal triggers : STD_LOGIC_VECTOR(15 downto 0); signal reset1 : STD_LOGIC; signal count_t : STD_LOGIC; -- Circuit behavior led <= not count (7 downto 0); reset1 <= triggers(1); count_t <= triggers(0); process(clk1) begin if rising_edge(clk1) then if (reset1 = '1') then count <= x"00"; elsif (count_t = '1') then count <= count + '1'; end if; end if; end process; -- FrontPanel endpoint instantiation tcount : okTriggerIn port map( ok1=>ok1, ep_addr=>x"41", ep_clk=>clk1, ep_trigger=>triggers );
Code language: PHP (php)