XEM6010
Clock Generator
Cypress CY22393 PLL
A multi-output, triple-PLL clock generator can provide up to five clocks, three to the FPGA and
another two to the expansion connectors JP2 and JP3. The PLL is driven by a 48-MHz signal output from the USB microcontroller. The PLL can output clocks up to 150-MHz and is configured through the FrontPanel software interface or the FrontPanel API.
| PLL Pin | Clock Name | Connection |
|---|---|---|
| CLKA | SYS_CLK1 | FPGA – AB13 |
| CLKB | SYS_CLK2 | FPGA – Y11 |
| CLKC | SYS_CLK3 | FPGA – AB11 |
| CLKD | SYS_CLK4 | JP2 – 11 |
| CLKE | SYS_CLK5 | JP3 – 8 |
| XBUF | N/A | Not Connected |