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The ZEM5305 must be powered externally via the two expansion connectors with several well-regulated power supplies.

Fixed Supplies

The following fixed supplies are required by the ZEM5305. These must be provided by the user peripheral attached to the ZEM5305. Our BRK5305 may be used as a reference for the required supplies. Schematics and layout files in Altium Designer format are available for download through Pins.

Supply NameExpansion PinsVoltageToleranceNotes
+3.3VDDMC1-5+3.3v± 5%USB, LVDS clock, and LEDs
+3.3VAUXMC2-69+3.3v± 5% 
+2.5VDDMC1-7+2.5v± 5%FPGA aux, DDR3 termination
+1.5VDDMC1-9+1.5v± 5%DDR3
+1.35v± 5%DDR3L (optional operating voltage)
+1.2VDDMC1-11+1.2v± 0.05vUSB
+1.1VDDMC1-6, -8,
-10, -12
+1.1v± 0.03vFPGA core

Current Requirements

The following table provides suggestions for operating currents on the various supply rails. Unless otherwise noted, these numbers do not take into account the power requirements of the FPGA. The user must determine these requirements using power estimates or empirical data once the final system design has been determined. Power requirements can vary significantly depending on operating frequencies, temperature, I/O standards, switching rates, logic, and other variables. The suggested supply guidelines are rather conservative and also reflect sizing to common LDO and switcher limits.

Supply VoltageOperating CurrentSuggestedNotes
+1.1 voltsN/A2.0 AFPGA core (Vccint) must be determined by end user.
+1.2 volts260 mA1.5 APower-on inrush for the FX3 may peak to 800 mA. This supply must accommodate this peak inrush. 
+1.5 volts500 mA1.0 AThis is an approximate typical consumption for the DDR3 and the associated FPGA I/O. 
+2.5 volts100 mA250 mA 
+3.3 volts150 mA250 mA 

USB Bus Power

The USB’s 5v supply is provided to the expansion header and power header to enable the design of bus-powered applications. The USB 3.0 specification allows for up to 4.5 W (900mA at 5v) to be provided to external peripherals over the USB cable. While power consumption of an unconfigured ZEM5305 is quite low, due to the flexibility allowed in FPGA design, the Cyclone V E and DDR3 could potentially consume over 4.5 W during operation with a user design, thus violating the USB specification.

Before relying on USB power, you should be aware of the limitations and the fact that using USB power may render the ZEM5305 a USB-noncompliant device.

USB bus power is available on MC1-3 and can be used by the attached peripheral device to generate the power rails required by the ZEM5305.

I/O Triples

For each Altera FPGA I/O bank, there are three relevant power supplies. We call these three supplies an I/O Triple. These triples are set according to the I/O standard(s) required for I/O on the bank. Please refer to the extensive Altera documentation for more information on which settings are required for each standard.

  • VCCIO - The I/O supply and is set according to the I/O standard selected for the bank.
  • VCCPD - The pre-driver voltage for the bank. It is set according to:
    • If VCCIO = 3.3v, set VCCPD = 3.3v
    • If VCCIO = 3.0v, set VCCPD = 3.0v
    • If VCCIO ≤ 2.5v, set VCCPD = 2.5v
  • VREF - This is a reference voltage required for some standards. Note that this is not required for many of the supported I/O standards.

 

FPGA BankFPGA SupplyExpansion PinsRestrictions
2VCCIO2MC2-42

None

See Altera documentation for details.

VCCPD2MC1-13
VREF2MC2-4 
4VCCIO4MC1-16Shared with USB host interface.
VCCPD4 must be 2.5v.
VCCPD4MC1-15, MC2-70
VREF4MC1-18 
5VCCIO5MC2-41

None

See Altera documentation for details.

VCCPD5MC1-17
VREF5MC2-3

FPGA Bank 4 provides connections to both the mezzanine connectors and the USB host interface. Due to limitations of the host interface, VCCPD4 must be +2.5v and therefore, bank 4 must be used with I/O Standards for which VCCPD4 = 2.5v.

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